MIT Technology Review · AIMar 13, 2026, 17:00 UTC+8

Future AI chips could be built on glass

Absolics plans to start commercial glass-substrate production in 2026 for AI data-center chip packaging. The post gives three concrete metrics: up to 10x more connections per millimeter, 50% more silicon in the same package area, and 12,000 square meters of annual panel capacity. The real issue is packaging limits, not material hype; Intel has shown a glass-core device that booted Windows, while large-scale yield and cost are not disclosed.

Why it matters: HKR-H lands on the 'AI chips on glass' hook. HKR-K lands on 10x interconnect density, 50% more silicon per package, and 12,000 m²/year capacity. HKR-R lands because packaging bottlenecks hit AI infra cost and supply, but yield and cost at scale are undisclosed.

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Take

Glass substrates should be read as a packaging constraint story, not a cute materials story. AI accelerators are running into warpage, interconnect density, and heat at the package level. Absolics gives real hooks: up to 10x more connections per millimeter than organic substrates, 50% more silicon in the same package area, and commercial production in 2026 with 12,000 square meters of annual panel capacity.

That last number is the brake. 12,000 square meters sounds industrial, but it is not huge once large AI packages enter the math. Intel has already shown a glass-core device booting Windows, so this is beyond lab theater. But yield, cost, and customer qualification timing are not given. TSMC CoWoS already taught the market the same lesson: AI chip supply often breaks at package capacity, not transistor ambition.

Source: MIT Technology Review · AI · technologyreview.com
Published: Mar 13, 2026, 17:00 UTC+8 · Mar 13, 2026